일반 [re] [질문] PXA-255에 256M SDRAM을 올리려고합니다. 도움을 부탁합니다.

PXA255 에서 SDRAM 을 256Mbyte 까지 사용하실수 있습니다.(메모리 8개)
EZ-X5 보드는 128MByte 까지 만을 사용할수 있구요(SDRAM 을 2개 더 붙였을 경우)
EZ-X5 커널 2.4 기준으로 하셨던것 처럼 설정하시면 가능합니다.(SDRAM 레지스터 변경, 커널 메모리 변경)

커널메세지중 uncompress 부터 시작해서 ....... 이런거 나올때 까지는 하위쪽 메모리가 사용됩니다.
하지만 커널이 시작해서 메모리 배치가 시작되면 상위메모리를 차지하게 됩니다.
이때 아무런 메세지가 나오지 않았다면 상위 메모리가 제대로 동작하지 않았다라고 예상할수 있습니다.
부트로더에서 메모리 테스트 만으로는 메모리가 정상이라고 판단하기 힘듭니다.
메모리 버스가 문제라면 아마도 커널 부팅중에 코아덤프내고 (에러메세지 수두록하게) 정지했을꺼라 예상되지만
지금 현상으로는 상위 메모리 자체의 엑세스가 안된것 같은 느낌입니다.
하드웨어 증상을 간단한 텍스트로 질문하고 답하는것은 정말 어려운 문제입니다.
우선 회로도를 면밀히 검토해 보시기 바랍니다. 회로도 잘못으로 안되는 경우가 참 많습니다. ^^



>PXA-255에 256M SDRAM 올려보신분의 도움을 부탁합니다.
>PXA-255 Data Sheet에 4-Bank로 구성하여 SDRAM을 256M 까지 가능하다고 하는데...
>올려보신분 있나요?
>
>그냥 단순하게 64M -> 128M 방법과 동일하게 하니 않되네요!
>다른 설정이 있는 것 같은데..
>EZBOOT> 에서는 메모리제어가됩니다.
>고수님들의 도움 부탁합니다. 유영창님이 고수라고 하는데....
>
>아래와 같이 설정하였습니다.
>
>
>
>##### kernel #####
>
>System Type -> Intel PXA250/210 Implementations -> (256M-4Bank) EZ-X5 RAM Available
>
>
>##### linux-2.4.19-x5-v07/arch/arm/mach-pxa/ez_x5.c #####
>
>static void __init
>fixup_ez_x5(struct machine_desc *desc, struct param_struct *params,
>                char **cmdline, struct meminfo *mi)
>{
>        // SDRAM 을 선언하는 부분이다.
>#if   defined(CONFIG_RAM256B4_EZ_X5)
>        SET_BANK (0, 0xa0000000, 64*1024*1024); //-- 64Mbyte
>        SET_BANK (1, 0xa4000000, 64*1024*1024); //-- 64Mbyte
>        SET_BANK (2, 0xa8000000, 64*1024*1024); //-- 64Mbyte
>        SET_BANK (3, 0xac000000, 64*1024*1024); //-- 64Mbyte
>        mi->nr_banks = 4;
>
>
>##### ezboot/include/ez_x5.h #####
>
>//----------------------------------------------
>//      SDRAM config
>#define PXA_REG_MDCNFG          0x48000000
>//----------------------------------------------
>
>//##############################################
>// 사용하는 SDRAM 파티션(뱅크)을 활성화 한다.
>#define MDCNFG_DE0              (1 <<0 )        // SDRAM 0   Partition  Enable = 1
>#define MDCNFG_DE1              (1 <<1 )        // SDRAM 1   Partition
>//##############################################
>
>#define MDCNFG_DWID0            (0 <<2 )        // SDRAM 0/1 BusWidth 32bit  = 0
>#define MDCNFG_DCAC0            (1 <<3 )        // SDRAM 0/1 colume address count
>#define MDCNFG_DRAC0_128        (1 <<5 )        // SDRAM 0/1 row address count
>#define MDCNFG_DRAC0_256        (2 <<5 )        // SDRAM 0/1 row address count
>#define MDCNFG_DNB0             (1 <<7 )        // SDRAM 0/1 bank count
>#define MDCNFG_DTC0             (3 <<8 )        // SDRAM 0/1 Timing
>#define MDCNFG_DADDR0           (0 <<10)        // SDRAM 0/1 Address match mode
>#define MDCNFG_DLATCH0          (1 <<11)        // SDRAM 0/1 must be set
>#define MDCNFG_DSA1111_0        (1 <<12)        // SDRAM 0/1 use sa1111 = 0
>
>#define MDCNFG_DE2              (1 <<(0 +16))   // SDRAM 2   Partition  Enable = 1
>#define MDCNFG_DE3              (1 <<(1 +16))   // SDRAM 3   Partition
>
>#define MDCNFG_DWID2            (0 <<(2 +16))   // SDRAM 2/3 BusWidth 32bit  = 0
>#define MDCNFG_DCAC2            (1 <<(3 +16))   // SDRAM 2/3 colume address count
>#define MDCNFG_DRAC2_128        (1 <<(5 +16))   // SDRAM 2/3 row address count
>#define MDCNFG_DRAC2_256        (2 <<(5 +16))   // SDRAM 2/3 row address count
>#define MDCNFG_DNB2             (1 <<(7 +16))   // SDRAM 2/3 bank count
>#define MDCNFG_DTC2             (3 <<(8 +16))   // SDRAM 2/3 Timing
>#define MDCNFG_DADDR2           (0 <<(10+16))   // SDRAM 2/3 Address match mode
>#define MDCNFG_DLATCH2          (1 <<(11+16))   // SDRAM 2/3 must be set
>#define MDCNFG_DSA1111_2        (1 <<(12+16))   // SDRAM 2/3 use sa1111 = 0
>
>#define MDCNFG_DE               ( MDCNFG_DE2 | MDCNFG_DE3 )
>#define MDCNFG_STD_VALUE        ( MDCNFG_DE0  | MDCNFG_DE1    | MDCNFG_DWID0   | MDCNFG_DCAC0 | MDCNFG_DNB0
>                                | MDCNFG_DTC0 | MDCNFG_DADDR0 | MDCNFG_DLATCH0 | MDCNFG_DSA1111_0          
>                                | MDCNFG_DE2  | MDCNFG_DE3    | MDCNFG_DWID2   | MDCNFG_DCAC2 | MDCNFG_DNB2
>                                | MDCNFG_DTC2 | MDCNFG_DADDR2 | MDCNFG_DLATCH2 | MDCNFG_DSA1111_2           )
>
>#define MDCNFG_128_VALUE        ( MDCNFG_DRAC0_128 | MDCNFG_DRAC2_128 | MDCNFG_STD_VALUE )
>#define MDCNFG_256_VALUE        ( MDCNFG_DRAC0_256 | MDCNFG_DRAC2_256 | MDCNFG_STD_VALUE )
>
>//##############################################
>// 사용하는 SDRAM 하나의 용량을 선택한다.(16Mbyte == 128Mbit)
>#define MDCNFG_VALUE            MDCNFG_256_VALUE
>//##############################################
>
>
>##### EZBOOT TESTING RESULTS
>
>EZBOOT>md 0xa0000000
>A000-0000 :00000000 434D443D 00000000 20696E69   ....CMD=.... ini
>A000-0010 :7472643D 30786130 38303030 30302C35   trd=0xa0800000,5
>A000-0020 :4D20726F 6F743D2F 6465762F 72616D20   M root=/dev/ram
>A000-0030 :72616D64 69736B3D 31323238 3820636F   ramdisk=12288 co
>
>EZBOOT>md 0xa4000000
>A400-0000 :CCE4CCEC FFF3BFFF FCFEFFEF FFFFBFFF   ................
>A400-0010 :FFFDFFBF B7BFBFFF EDFFFFFD FFF7BFF7   ................
>A400-0020 :FCFFFFEF FBBFFFFB E5EDEFEF 7FFFBBFF   ................
>A400-0030 :DFDDAFEE BFF7FFFF FDFFEFEF BFF5FFAF   ................
>
>EZBOOT>md 0xa8000000
>A800-0000 :CCEFEEFE FFFFBFFF FFFFFFFF FFFFFFFF   ................
>A800-0010 :FFFFFFFF FFBFFFFF FFFFFFFF FFFFFFFF   ................
>A800-0020 :FFFFFFFF FFFFFFFF EFFFFFFF FBFFFFFF   ................
>A800-0030 :FFFFFFFF BFFFFFFF FFFFFFFF FFFFFFFF   ................
>
>EZBOOT>mwl 0xa8000000 0x12345678
>
>EZBOOT>md 0xa8000000
>A800-0000 :78563412 FFFFBFFF FFFFFFFF FFFFFFFF   xV4.............
>A800-0010 :FFFFFFFF FFBFFFFF FFFFFFFF FFFFFFFF   ................
>A800-0020 :FFFFFFFF FFFFFFFF EFFFFFFF FBFFFFFF   ................
>A800-0030 :FFFFFFFF BFFFFFFF FFFFFFFF FFFFFFFF   ................
>
>EZBOOT>md 0xac000000
>AC00-0000 :DFFCADCC FFFFBFBF FFFFDFAF FFFFBFFF   ................
>AC00-0010 :FFFFFDFF FFFF3DBF FFFFFFFF FFFFBFBF   ......=.........
>AC00-0020 :FFFFEEFF 7FFFFFBF FFFFEFFD FFFFA7BF   ................
>AC00-0030 :FFFFDFFD FFFFBFBF FFFFEFFF FFFFFBBF   ................
>
>EZBOOT>mwl 0xac000000 0x87654321
>
>EZBOOT>md 0xac000000
>AC00-0000 :21436587 FFFFBFBF FFFFDFAF FFFFBFFF   !Ce.............
>AC00-0010 :FFFFFDFF FFFF3DBF FFFFFFFF FFFFBFBF   ......=.........
>AC00-0020 :FFFFEEFF 7FFFFFBF FFFFEFFD FFFFA7BF   ................
>AC00-0030 :FFFFDFFD FFFFBFBF FFFFEFFF FFFFFBBF   ................
>
>
>##### BOOTING 1
>
>WELCOME EZBOOT.X5 V1.9...................for PXA255
>Last Modify Apr 13 2007
>
>Boot Flash Check ......................
>  Detect MX29LV400 (TOP)Flash : 22B9
>  SIZE 4M-BIT [512Kbyte]
>
>NAND Chip Check .......................
>  Detect SAMSUNG [ec:76] 64MByte
>  BAD BLOCK SCAN ->  Kernel, Ramdisk Bad Block [0]
>
>CS8900 Init............................
>  Mac Address  : [00 07 04 11 17 20]
>  Detect value : [3000:3000]
>  Chip ID      : [0E63:000A]
>
>Quickly Autoboot [ENTER] / Goto BOOT-MENU press [space bar].....
>Copy Kernel Image .....
>Copy Ramdisk Image .....
>Starting kernel [MARCH 303]...
>Uncompressing Linux...................................................... done, booting the kernel.
>
>
>##### BOOTING 2
>
>##### SET_BANK 2, 3 DISABLE시
>
>        SET_BANK (0, 0xa0000000, 64*1024*1024); //-- 64Mbyte
>        SET_BANK (1, 0xa4000000, 64*1024*1024); //-- 64Mbyte
>     // SET_BANK (2, 0xa8000000, 64*1024*1024); //-- 64Mbyte
>     // SET_BANK (3, 0xac000000, 64*1024*1024); //-- 64Mbyte
>
>
>CPU: XScale-PXA255 revision 6
>Machine: WWW.FALINUX.COM EZ-X5 for PXA255 Board
>Ignoring unrecognised tag 0x00000000
>Memory clock: 99.53MHz (*27)
>Run Mode clock: 398.13MHz (*4)
>Turbo Mode clock: 398.13MHz (*1.0, inactive)
>On node 0 totalpages: 32768
>zone(0): 32768 pages.
>zone(1): 0 pages.
>zone(2): 0 pages.
>Kernel command line: y  initrd=0xa0800000,5M root=/dev/ram ramdisk=12288 console=ttyS02,115200  ip0=192.168.2.2 nandparts=1,5,58 arch=EZ-X5
>Console: colour dummy device 80x30
>Calibrating delay loop... 397.31 BogoMIPS
>Memory: 64MB 64MB 0MB 0MB = 128MB total
>Memory: 122684KB available (1314K code, 431K data, 64K init)
>Dentry cache hash table entries: 16384 (order: 5, 131072 bytes)
>Inode cache hash table entries: 8192 (order: 4, 65536 bytes)
>Mount-cache hash table entries: 2048 (order: 2, 16384 bytes)
>Buffer-cache hash table entries: 8192 (order: 3, 32768 bytes)
>Page-cache hash table entries: 32768 (order: 5, 131072 bytes)
>POSIX conformance testing by UNIFIX
>Linux NET4.0 for Linux 2.4
>Based upon Swansea University Computer Society NET3.039
>Initializing RT netlink socket
>Using PXA255 frequency points.
>Registering CPU frequency change support.
>CPU clock: 398.131 MHz (99.000-400.000 MHz)
>Starting kswapd
>Journalled Block Device driver loaded
>Console: switching to colour frame buffer device 80x30
>LCD resolution 640x480
>pty: 256 Unix98 ptys configured
>Serial driver version 5.05c (2001-07-08) with no serial options enabled
>ttyS00 at 0x0000 (irq = 15) is a PXA UART
>ttyS01 at 0x0000 (irq = 14) is a PXA UART
>ttyS02 at 0x0000 (irq = 13) is a PXA UART
>mk712 device OK!
>eth0: cs8900 rev K Base 0xF1000300<6>, IRQ 44, MAC 00:07:04:11:17:20
>RAMDISK driver initialized: 16 RAM disks of 12288K size 1024 blocksize
>loop: loaded (max 8 devices)
>NAND device: Manufacture ID: 0xec, Chip ID: 0x76 (Samsung NAND 64MB 3,3V)
>Creating 3 MTD partitions on "NAND 64MB 3,3V":
>0x00000000-0x00100000 : "EZ-X5 Kernel partition"
>0x00100000-0x00600000 : "EZ-X5 Ramdisk partition"
>0x00600000-0x04000000 : "EZ-X5 Data partition 0"
>